The present invention relates generally to methods of processing multi-level metal semiconductor devices, and more particularly to a method of multi-level metal processing that etches troughs in an oxide layer and selectively deposits metal into the troughs to form the higher-order metal lines.
Conventional multi-level metal semiconductor fabrication processes comprise sputtering blanket aluminum onto a blanket dielectric layer, and patterning and etching these blanket layers to define metal lines. The interconnection of the multi-level metal lines is accomplished by the use of contacts and via openings. The conventional procedures have several disadvantages. The patterning and etching of the metal lines creates corrosion and contaminants which result in yield problems. The metal step coverage over via, contact, and the first metal layer requires tight alignment tolerances. It is necessary to planarize the dielectric layer to allow better metal step coverage. The dielectric layer has voids and sleeves at closely spaced metal lines. Aluminum, a primary metal layer material has electromigration, corrosion, hillock and junction spike problems, as are well known in the art.